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METHODS FOR FABRICATING INTEGRATED CIRCUITS USING

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专利名称:METHODS FOR FABRICATING INTEGRATED

CIRCUITS USING CHEMICAL MECHANICALPOLISHING

发明人:Lup San Leong,Alan Cing Gie Lim,Ling Wu,Jian

Bo Yang

申请号:US14092217申请日:20131127

公开号:US20150147872A1公开日:20150528

专利附图:

摘要:Methods for fabricating integrated circuits are disclosed. In an exemplary

embodiment, a method for fabricating an integrated circuit includes forming a siliconmaterial layer over a semiconductor substrate. The semiconductor substrate includes alogic device region and a memory array region. The memory array region has a memorydevice formed on the semiconductor substrate. The method further includes forming acapping layer over the silicon material layer and over the memory device and removingthe capping layer from over the memory device in the memory array region using a firstchemical mechanical polishing process while leaving at least a first portion of the cappinglayer in place over the logic device region. Further, the method includes removing thefirst the silicon material layer from over the memory device in the memory array regionusing a second chemical mechanical polishing process.

申请人:GLOBALFOUNDRIES Singapore Pte. Ltd.

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